Migrate to instro (v1)

python migrate_to_instro.py path/to/your/project --dry-run

[DRY-RUN] Migrating /Users/me/my-test-rack
  src/test_rig.py             (12 replacements)
  src/publishers.py           (3 replacements)
  pyproject.toml              (4 replacements)
  requirements.txt            (1 replacements)

Files changed:  4
Total subs:     20
By token:
  nominal_instro                           8
  NominalDAQ                               4
  nominal-instro                           4
  NominalInstrument                        2
  NominalDMM                               2

python migrate_to_instro.py path/to/your/project

# uv
uv sync

# or pip
pip install -e .

# run your tests
pytest

rg 'nominal[_-]instro' .
rg '\bNominal(DAQ|DMM|PSU|I2C|ELoad|Modbus|Scope|Instrument)\b' .

psu = InstroPSU(name="main", driver=..., num_channels=1, legacy_naming=True)
# publishes  main.ch1_v, main.ch1_v.cmd, main.ch1_i, ...  (pre-v1.0 names)

# PSU / ELoad short-letter suffixes
rg -l '\.ch\d+_v\b'  | xargs sed -E -i '' 's/\.ch([0-9]+)_v\b/.ch\1.voltage/g'
rg -l '\.ch\d+_i\b'  | xargs sed -E -i '' 's/\.ch([0-9]+)_i\b/.ch\1.current/g'
rg -l '\.ch\d+_en\b' | xargs sed -E -i '' 's/\.ch([0-9]+)_en\b/.ch\1.enabled/g'

# ELoad descriptive suffixes (separator change only, plus _enable → .enabled)
for suf in mode level short range slewrate; do
  rg -l "\.ch\\d+_${suf}\\b" | xargs sed -E -i '' "s/\.ch([0-9]+)_${suf}\\b/.ch\\1.${suf}/g"
done
rg -l '\.ch\d+_enable\b' | xargs sed -E -i '' 's/\.ch([0-9]+)_enable\b/.ch\1.enabled/g'

# Scope (separator change, plus probe_atten → probe_attenuation)
for suf in vrms vpp vmax vmin vavg vscale voffset coupling waveform frequency; do
  rg -l "\.ch\\d+_${suf}\\b" | xargs sed -E -i '' "s/\.ch([0-9]+)_${suf}\\b/.ch\\1.${suf}/g"
done
rg -l '\.ch\d+_probe_atten\b' | xargs sed -E -i '' 's/\.ch([0-9]+)_probe_atten\b/.ch\1.probe_attenuation/g'

rg '"[A-Za-z_][A-Za-z0-9_]*_[A-Za-z_][A-Za-z0-9_]*_cmd"'   # I2C-style _cmd string literals
rg 'channel_data\[\s*"[^."]+"\s*\]'                         # channel_data keyed by bare alias (DAQ digital candidate)

from instro.lib import Command, Instrument, Measurement
from instro.lib.instrument import publish_command, publish_measurement


class InstroMyThing(Instrument):
    @publish_command
    def set_setpoint(self, value: float, channel: int = 1, **kwargs) -> Command:
        with self._resource_lock:
            self._driver.set_setpoint(value, channel=channel)
            ts = time.time_ns()
        return self._package_command(f"ch{channel}.setpoint.cmd", value, ts, **kwargs)

    @publish_measurement
    def get_readback(self, channel: int = 1, **kwargs) -> Measurement:
        with self._resource_lock:
            value = self._driver.get_readback(channel=channel)
            ts = time.time_ns()
        return self._package_measurement(f"ch{channel}.readback", value, ts, **kwargs)

# Before: device-relative channel, device_id prepended for you
daq = InstroDAQ(name="myDAQ", driver=NIDAQDriver(device_id="Dev1"))
daq.configure_analog_channel(direction=Direction.INPUT, physical_channel="ai0", alias="ch_0", range_min=0, range_max=5)
daq.configure_digital_line(direction=Direction.OUTPUT, physical_channel="port0/line0", alias="do_0", logic=Logic.HIGH)

# After: fully qualified channel
daq = InstroDAQ(name="myDAQ", driver=NIDAQDriver(device_id="Dev1"))
daq.configure_analog_channel(direction=Direction.INPUT, physical_channel="Dev1/ai0", alias="ch_0", range_min=0, range_max=5)
daq.configure_digital_line(direction=Direction.OUTPUT, physical_channel="Dev1/port0/line0", alias="do_0", logic=Logic.HIGH)

# Before: one method, port_width selects line vs port
daq.configure_digital_channel(direction=Direction.OUTPUT, physical_channel="Dev1/port0/line0", logic=Logic.HIGH, alias="do_0")
daq.configure_digital_channel(direction=Direction.INPUT, physical_channel="Dev1/port0", logic=Logic.HIGH, port_width=DigitalPortWidth.WIDTH_8, alias="di_port")

# After: line and port are separate methods
daq.configure_digital_line(direction=Direction.OUTPUT, physical_channel="Dev1/port0/line0", logic=Logic.HIGH, alias="do_0")
daq.configure_digital_port(direction=Direction.INPUT, physical_channel="Dev1/port0", logic=Logic.HIGH, port_width=DigitalPortWidth.WIDTH_8, alias="di_port")

git checkout .